Question

When using a Direct Memory Access (DMA) controller, what signal does the peripheral assert to inform the CPU that it has been granted control of the system bus for data transfer?

Accepted Answer

The signal the peripheral or DMA controller receives to confirm it has been granted control of the bus is called the DMA Acknowledge signal, commonly abbreviated as DACK or DACKn. In a typical bus arbitration process, the peripheral first asserts a DMA Request signal, known as DREQ, to the DMA controller to ask for bus access. The DMA controller then requests bus control from the CPU using a Bus Request signal, labeled HOLD or BR. Once the CPU finishes its current bus cycle, it releases the bus and asserts a Bus Grant signal, labeled HLDA or BG, back to the DMA controller. Upon receiving this grant, the DMA controller asserts the DACK signal to the peripheral, which serves as the formal notification that the peripheral now has legal control of the system bus to begin transferring data directly to or from system memory without involving the CPU.

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When using a Direct Memory Access (DMA) controller, what signal does the peripheral assert to inform the CPU that it has been granted control of the system bus for data transfer?

The signal the peripheral or DMA controller receives to confirm it has been granted control of the bus is called the DMA Acknowledge signal, commonly abbreviated as DACK or DACKn. In a typical bus arbitration process, the peripheral first asserts a DMA Req....